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VMIVME-5565-110000 is an ultra-high-speed fiber optic reflective memory node card based on the VMEbus, belonging to the
VMIC reflective memory real-time fiber optic network product series. It adopts the standard 6U Eurocard form factor, and can form a network with products of the same series such as VMIPMC-5565 and VMIPCI-5565 via standard fiber optic cables, enabling real-time data sharing between computers, workstations, PLCs and other embedded controllers with different architectures and operating systems.
With its autonomous data transmission mechanism that requires no host processor involvement, ultra-high-speed fiber optic communication capability, and rich configuration and fault-tolerant features, this product is widely applicable to scenarios with stringent requirements for real-time performance and reliability, such as industrial control and military systems.
related documents
VMIVME-5565-110 Datasheet.pdf
VMIVME5565.pdf
Core Features - GE VMIVME-5565-110000
Superior Communication Performance
Supports 2.12 Gbaud serial fiber optic network transmission. The data transfer rate dynamically adjusts between 43 Mbytes/sec (4-byte data packet) and 174 Mbytes/sec (64-byte data packet) based on the data packet size, meeting the requirements of high-speed real-time data exchange.Flexible Network Scale
Supports up to 256 nodes, compatible with multi-mode fiber (maximum transmission distance of 300 meters) and single-mode fiber (maximum transmission distance of 10 kilometers), adapting to networking needs of different scenarios.Rich Storage Configuration
Provides 64 Mbytes or 128 Mbytes of SDRAM reflective memory with parity check. The parity check function can be enabled through register configuration to ensure data storage integrity.Interrupt and DMA Support
Equipped with 4 general-purpose network interrupts (each with 32-bit data) and supports VMEbus DMA transmission, which can reduce the load on the host processor and improve system response speed.Comprehensive Fault-Tolerant Mechanism
Supports redundant transmission mode, reducing the risk of data loss through dual data transmission; has Rogue data packet detection and removal functions, and can ensure network stability by configuring Rogue Master nodes.Strong Compatibility
Strictly complies with VMEbus specifications (ANSI/IEEE STD 1014-1987, IEC 821 and 297), supports A32/A24 address spaces and D32/D16/D08 data widths, and is compatible with various VMEbus systems.
Working Principle
Basic Transmission Mechanism
All nodes in the network are interconnected in a daisy-chain loop via fiber optic cables, and each node must be configured with a unique node ID. When the VMEbus host system writes data to the on-board SDRAM, the on-board circuit automatically writes the data to the transmit FIFO, encapsulates it into dynamic data packets of 4–64 bytes, and then transmits the packets to the next node through the fiber optic interface.
Data Synchronization Logic
The circuit of the receiving node parses the data packets and stores them in the receive FIFO, then writes the data to the corresponding address of the local SDRAM. Meanwhile, the data is forwarded to the node’s own transmit FIFO until the data is sent back to the source node and removed, achieving full-network data synchronization.
Byte Order Adaptation
It is compatible with both Big Endian and Little Endian byte ordering modes. The byte conversion hardware of the PCI-to-VMEbus interface resolves data transmission compatibility issues between processors of different architectures.
Configuration & Installation
Hardware Configuration
- Node ID SettingConfigure the node ID (range: 0–$FF, i.e., 0–255) via the 8-bit switch S6. Ensure all node IDs in the network are unique. The switch status follows the rule: ON = 0, OFF = 1.
- Redundancy & Rogue Master ConfigurationSelect the transmission mode via jumper E5: install the jumper on pins 1–2 for non-redundant mode, and remove it for redundant mode.Configure Rogue Master 0/1: remove the jumper on pins 3–4 to enable Rogue Master 0; remove the jumper on pins 5–6 to enable Rogue Master 1.
- Address Space ConfigurationConfigure the address space (A32/A24) and access mode (privileged/unprivileged) of control and status registers via switches S7, S4 and S3.Configure the address space and access mode of SDRAM memory via switch S8 to avoid address conflicts.
Installation Procedure
- In the power-off state, verify that all switch and jumper configurations meet the networking requirements.
- Insert the card into any non-system controller slot of the VMEbus chassis (avoid Slot 1). Ensure the board connector is firmly mated with the backplane and secure the card with screws.
- Connect fiber optic cables according to the loop topology: link the TX port of the current node to the RX port of the next node; finally, connect the TX port of the last node back to the RX port of the first node to form a complete loop.
- After installation, check that all fiber optic connectors are fully seated. Install dust caps on unused ports to protect the optical components.
Programming Support
Register Set
- RFM Control and Status RegistersLocated at offset $1200, this set includes registers for board version, node ID, local control & status, interrupt status & enable, etc. It supports functions such as network interrupt configuration and parity check activation.
- Universe II RegistersLocated at offset $0, these registers are divided into two categories:
- Control and Status Registers: e.g., VMEbus interrupt enable registers, interrupt mapping registers
- DMA Control Registers: e.g., transfer control registers, address registers, byte count registersThey support VMEbus interrupt configuration and DMA data transmission.
Core Programming Scenarios
- Network Interrupt HandlingBy configuring the LISR (Local Interrupt Status Register), LIER (Local Interrupt Enable Register) and VINT_EN (VMEbus Interrupt Enable Register), 4 types of network interrupts can be enabled. The receiver can read the interrupt sender ID and data via FIFO.
- DMA Transfer ConfigurationBy programming the DCTL (DMA Transfer Control Register), DLA (PCI Bus Address Register) and DVA (VMEbus Address Register) etc., high-speed data transmission between PCI and VMEbus can be realized. It supports a maximum transmission capacity of 16 Mbytes and multiple data widths.
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